Electronics & Telecommunication Engineer

ANGIRA MUKHERJEE

I design electronics that behave beautifully before they become hardware.

Current signal
Research Intern · TIHAN, IIT Hyderabad
Base node
Howrah · Kolkata · Hyderabad
POWER_MUX / REV.04 LIVE SIGNAL
100A continuous
25V UAV system
Priority power multiplexer signal diagram Tether and battery power inputs route through protected switching paths to a high-current output. TETHER_IN BATTERY_IN LOAD_OUT MANUAL_OVERRIDE LM74800-Q1 IDEAL DIODE CTRL LM74800-Q1 BACKUP PATH CTRL
ANALOG DESIGN PCB LAYOUT RISC-V VERILOG EMBEDDED SYSTEMS CONTROL SYSTEMS
00 / FIELD NOTE

From first principle
to fabrication.

I’m an Electronics and Telecommunication Engineering student at IIEST Shibpur, drawn to the point where a clean idea has to survive real current, timing, noise, and constraints.

My work moves between analog power design, processor architecture, embedded control, and PCB layout — with verification built into every stage.

8.53
CGPA at IIEST
100A
continuous design target
100MHz
verified RISC-V operation
MATLAB Cody winner

01 / SELECTED WORK

Built to carry
real signals.

Three systems. Three different layers of abstraction. One bias toward rigorous verification.

02

Verilog · Digital system design

RISC-V Batch
Processing System

A 32-bit non-pipelined RV32I processor and FSM-based control system for low-cost batch mixing automation.

PCCTRLALUREGMEMI/O
  • Real-time virtual sensors and actuators
  • Memory-mapped I/O and RV32I assembly
  • Verified at 100MHz in Vivado
03

Arduino · C++ · Robotics

Line Following
Robot Car

An Arduino Nano robot using an IR sensor array, motor drivers, and a tuned PID controller for precise, stable tracking.

ERROR(t) P + I + D MOTOR_OUT

02 / JOURNEY

Where theory met
the bench.

MAY 2026 — PRESENT

TIHAN · IIT HYDERABAD

Research Intern

Working across pre-layout hardware verification, schematic validation, and production-ready high-current PCB development to catch functional and integration issues before fabrication.

PCB VERIFICATIONKICADPOWER ELECTRONICS
JUN — JUL 2025

BIT MESRA · RANCHI

Research Intern

Designed a small-scale batch-processing system around a 32-bit RISC-V architecture and authored the research that took the design to an IEEE conference.

RISC-VVERILOGRESEARCH
IEEE ACCEPTED

First-author publication · July 2025

Design and Implementation of a Small-Scale Batch Mixing System using RISC-V

Accepted at the 13th IEEE International Conference on Intelligent Systems and Embedded Design (ISED), NIT Raipur.

03 / RECOGNITION

Proof in the
output.

Milestones earned across research, computation, and early-stage innovation.

2025 + 2026

MATLAB Cody Challenge Winner

Two-time winner across consecutive annual challenge cycles.

JAN 2026 R

GAABESU Research Award

IIEST Shibpur Alumni recognition for research promise.

FEB 2025 S

IAmFutureReady Scholar

Selected by Infosys Foundation for the scholarship program.

JUN 2024 03

Institutional Startup Competition

Second runners-up at IIEST Shibpur.

TEXAS INSTRUMENTS
BYTE

Texas BYTE Participant

Exploring applied electronics through an industry-led technical platform.

04 / TOOLBOX

Tools on my
workbench.

A / LANGUAGES
  • C / C++
  • MATLAB
  • Verilog
  • HTML / CSS
B / SOFTWARE
  • KiCad
  • Xilinx Vivado
  • LTspice + PSpice
  • NI Multisim
  • Micro-Cap 12
C / DOMAINS
  • Analog + Digital Electronics
  • VLSI + CAD
  • Instrumentation + Control
  • Signals + Communication
  • Computer Architecture
D / SPOKEN
  • English
  • Hindi
  • Bengali
05 / EDUCATION

2023 — 2027

B.Tech, Electronics & Telecommunication Engineering

Indian Institute of Engineering Science and Technology, Shibpur
CGPA8.53
2023

Pathfinder Higher Secondary Public School

86%
2021

Bidya Bharati Girls’ High School

90.4%

06 / CONNECT

Have a hard problem
with a real signal?

I’m always open to research collaborations, hardware challenges, and conversations about systems worth building.

angiramukherjee2004@gmail.com